(A) Field of the Invention
The present invention relates to a variable impedance material, and more particularly, to a variable impedance material comprising high electro-magnetic permeability powder to reduce arcing.
(B) Description of the Related Art
Integrated circuits are externally fed with supply potentials and input signals to be processed and have processed output signals received from them. In particular, the input signal terminals are very sensitive, since the conductor tracks that feed the potentials and signals lead directly to a gate terminal of an input switching stage. While the integrated circuit is being manually handled, or during the automated processing to solder the integrated circuit on a circuit board, there is risk that the sensitive input stage or output stage may be destroyed by electrostatic discharge. For instance, the human body may be electrostatically charged and then discharged via the terminals leading to the outside of the semiconductor component containing the integrated circuit.
Tools of automatic component-mounting machines or test equipment may also be electrostatically charged and discharged via the semiconductor component. As technology advances and the scale of pattern lines on the semiconductor body bearing integrated circuits becomes smaller, there is a need for protection against such electrostatic discharges. Integrated circuit devices are often provided with some protection against electrostatic discharge (ESD) with high input currents, such as electrical resistors connected in their input paths, thereby limiting the input current.
U.S. Pat. No. 6,642,297 discloses a composition for providing protection against electrical overstress (EOS) comprising an insulating binder, doped semiconductive particles, and semiconductive particles. The composite materials exhibit a high electrical resistance to normal operating voltage values, but in response to an EOS transient the materials switch to a low electrical resistance and limit the EOS transient voltage to a low level for the duration of the EOS transient.
U.S. Pat. No. 6,013,358 discloses a transient voltage protection device wherein a gap between a ground conductor and another conductor is formed using a diamond-dicing saw. Substrate material selection includes specific ceramic materials having a density of less than 3.8 gm/cm3 designed to optimize performance and manufacturability. An overlay layer can be provided to minimize burring of the conductors during formation of the gap.
U.S. Pat. No. 5,068,634 discloses a material and device for electronic circuitry that provides protection from fast transient over-voltage pulses. The electrode device can additionally be tailored to provide electrostatic bleed. Conductive particles are uniformly dispersed in an insulating matrix or binder to provide a material having non-linear resistance characteristics. The non-linear resistance characteristics of the material are determined by the inter-particle spacing within the binder as well as by the electrical properties of the insulating binder. By tailoring the separation between the conductive particles, thereby controlling quantum-mechanical tunneling, the electrical properties of the non-linear material can be varied over a wide range.
U.S. Pat. No. 6,498,715 discloses a stack up type low capacitance over-voltage protective device comprising a substrate, a conductive low electrode layer formed on the substrate, a voltage sensitive material layer formed on the conductive lower electrode layer, and a conductive upper electrode layer formed on the voltage sensitive material layer.
U.S. Pat. No. 6,645,393 discloses a material for transient voltage suppressors composed of at least two kinds of evenly-mixed powders including a powder material with non-linear resistance interfaces and a conductive powder. The conductive powder is distributed within the powder with non-linear resistance interfaces to relatively reduce the total number of non-linear resistance interfaces between two electrodes and, as a result, decrease the breakdown voltage of the components.
In addition to electrostatic discharge, electronic devices are also very susceptible to electro-magnetic radiation, which is particularly acute in the case of digital computing devices. The digital computing device consists of a large number of transistors, which switch and transmit signals at very high speed. Consequentially, considerable electro-magnetic radiation is generated. The stray radiation could cause erroneous state switches, corruption signals, and loss of data.
Various techniques to protect electronic devices from electro-magnetic radiation are known. It is known to use a metal enclosure to shield the device. The electro-magnetic shielding can be achieved by blocking the radiation with highly conductive surface through reflection. However, the metal enclosure is not only very costly, but also the reflective shield to block high frequency radiation often leaks due to lack of radiation dampening capability. European patent EP0550373 disclosed an inner middle layer, which was constructed based on the material with relatively high magnetic permeability and relatively low electrical conductivity. During the electro-magnetic radiation strike, the middle layer absorbs most of the field's energy. The material with high magnetic permeability and low electrical conductivity is more effective at absorbing radiation than the highly conductive material.
The electrostatic and electro-magnetic coupling effect is well known for high frequency receiving and transmitting devices. U.S. Pat. No. 5,565,878 disclosed a loop-shape guard pattern, which is positioned on the sheet of the window glass for intensive electro-magnetic and electrostatic coupling between the guard pattern and an electric conductor disposed around the sheet of the window glass.
U.S. Pat. No. 6,058,000 disclosed a method of protection from electromagnetic interference and electrostatic discharge. The invention teaches a shielding conductor surface enclosure, an interior shielding conductor plane, a contact conductor from the shielding conductor plane and the shielding conductor surface enclosure, a path for electromagnetic signals to pass through a shielding conductor plane, a filter network, and an electrostatic voltage clamp. Protection is provided by filtering the incoming signals, electrically coupling the signals of an undesired bandwidth to a shield barrier, and electrically coupling signals of an undesired voltage to a shield barrier. The shield surface is physically differentiated from the ground plane surface.
The application of electro-magnetic and electrostatic discharge protection could be found from Patent WO/1996/028951—“Implant Device with Electrostatic Discharge Protection.” This patent application showed that a small number of cochlear devices failed and it was found that several of the elements associated with the data receiving function were damaged by a high level electrical shock. A number of experiments were performed in a laboratory to try to induce similar failures in other cochlear devices. More particularly, implants were submersed in a saline solution simulating body fluids and tissues, and subjected to high level electromagnetic fields so as to produce electrostatic discharge (ESD) into the implant. Therefore, one should pay special attention to the device damage problem not only from the angle of electrostatic discharge, but also from the angle of electro-magnetic field.
The SEMTECH Note SI97-01 describes how the TVS diodes were applied to protect devices from the ESD damage. This note mentioned that an electrostatic discharge to the shield of the coaxial connector causes an electromagnetic wave to propagate across the transceiver board interface to the circuit board. The wave travels along the metal traces, which connect the shield to the PC board ground plane. The effects of circuit board trace inductance can result in voltage potentials greater than 1.5 kV at the CDS pin. Voltage overstress of this magnitude can cause dielectric breakdown of the transceiver chip. Also, the current impulse flowing in the conductors will result in electromagnetic coupling of transients to surrounding components on the board. The transient voltage suppression (TVS) diodes are designed to shunt the transient current away from the protected Ethernet transceiver. The TVS diodes can both suppress the voltage overstress and shunt the transient current. However, the high cost and the lack of dampening capability are still the main drawback of TVS diodes.